Title: Senior Mixed Signal IP Enablement and Debug Engineer Location: Folsom United States Job Description: Job Details: Job Description: About the Role Join Intel's Hard IP Development Group (HIPD) within the Central Engineering Organization, where innovation meets execution. Our team develops industry-leading intellectual property that powers high-performance products across Server, Client, and Networking SoCs, as well as solutions for Intel Foundry customers. HIPD creates a comprehensive portfolio of cutting-edge Mixed Signal IPs including PLLs, Serial and Parallel IO PHYs (DDR/LPDDR, PCIe, USB, Type-C, UCIe Die-to-Die), and Ethernet PHYs. As part of our IO Post Silicon Validation Debug team, you'll work with a dynamic group of engineers who serve as the critical bridge between IP design teams and SoC customers throughout the validation and debug process. Key Responsibilities Customer-Focused IP Enablement - Partner closely with SoC customers and IP design teams to deliver comprehensive pre-silicon to post-silicon IP Integration and Debug support - Develop and execute test plans and content using AI-driven tools and Python/System Verilog scripting - Conduct SoC board design reviews and provide technical recommendations - Perform signal integrity and power integrity simulations to optimize design performance Silicon Validation & Debug Leadership - Serve as the IP team representative during SoC power-on activities for test chips and products - Provide hands-on IP enabling support throughout the silicon bring-up process - Lead identification, investigation, and resolution of IP-related silicon issues - Execute timely debugging and disposition of customer issues and sightings Technical Problem Solving - Conduct both pre-silicon and post-silicon issue reproduction and analysis - Drive root cause analysis initiatives with comprehensive failure analysis - Collaborate across cross-functional teams to deliver robust solutions - Maintain customer obsession by ensuring rapid resolution of IP-related challenges Core Competencies - Able to work independently with design team and customers to solve issues either remotely or onsite. - Able to lead on IP debug as situation arises in addition to hands on debug Qualifications: The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Qualifications - Bachelors and 5+ years of experience or Masters degree and 3+ years of experience in Computer Engineering, Electrical Engineering, or in a related field - Experience in IP Integration, pre-silicon verification, Electrical or Functional Post Silicon validation and debug with either serial IOs (PCIe, USB, SATA, TypeC, Ethernet) or parallel IOs (DDR, LPDDR, UCIe Die2Die) - 2+ years of experience with the lab hardware and software - Experience using Oscilloscopes, Logic Analyzers, Protocol analyzers and BERTs (Bit Error Ratio Testers) - Experience with at least one or more industry standard IO specifications like DDR, LPDDR, PCIE, USB, USB TypeC, Die2Die, Ethernet, etc. Either PHY or Controller experience is good Preferred Qualifications - Ph.D. degree in Computer Engineering, Electrical Engineering, or in a related field - Experience in signal integrity, power delivery, IBIS-AMI model development and silicon co- relation - Pre-silicon design or simulation experience in logic, circuits, firmware or MRC and mixed signal validation Why This Role Matters - You'll play a pivotal role in ensuring Intel's IP portfolio meets the demanding requirements of next-generation computing platforms. Your work will directly impact product success across multiple market segments while advancing the state-of-the-art in high-speed IO technologies. - This position offers the unique opportunity to work at the intersection of cutting-edge IP development and real-world customer applications, making you an integral part of Intel's continued innovation leadership. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: US, California, Santa Clara Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel. Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. - ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Role Description Support Engineers at Span lead complex implementations with our customers where the stakes are high and the path forward isn't always clear. You will embed with engineering leaders at top-tier organizations to understand their unique challenges, map their workflows, and deliver solutions that create measurable impact on their developer productivity and organizational clarity. You will work at the intersection of product, engineering, and customer success - building full-stack solutions, shaping integrations, and ensuring our platform creates real value in production environments. You will be the voice of the customer internally, translating field learnings into product improvements and reusable patterns that benefit our entire customer base. Success in this role means owning customer outcomes from first conversation to stable production adoption. You will balance speed with quality, technical depth with strategic thinking, and hands-on building with cross-functional leadership. In This Role You'll - Own technical delivery across multiple customer deployments from initial prototype to production scale, embedding with customer teams to understand their workflows and build full-stack solutions that solve their specific problems. - Scope work, make pragmatic trade-offs between speed and quality, and write production-grade code across our TypeScript, Python, and data pipeline stack when delivery depends on it. - Translate customer feedback into product requirements and create reusable patterns that help the team scale, influencing roadmap priorities based on real-world deployment learnings. You might thrive in this role if you - Bring 3+ years of engineering experience building full-stack products or complex integrations in fast-moving environments, with production-quality code in TypeScript/JavaScript and Python. - Have worked with data pipelines, ETL processes, and have integrated Large Language Models into products or workflows. - Thrive in ambiguous situations, communicate clearly with technical and non-technical stakeholders, and demonstrate ownership over customer outcomes with strong follow-through. - Have outstanding communication skills in English, both written and verbal, enabling you to collaborate effectively with US-based customers and internal teams. About our Stack - TypeScript, NestJS, React, Postgres, Redis - Airbyte, Dagster, Python, Kafka - AWS, K8S, FluxCD

Role Description We are seeking detail-oriented and customer-focused individuals to join our team as Remote Travel Planners. In this role, you will assist with researching travel options, coordinating reservations, communicating with suppliers, and helping ensure travel arrangements are accurate and organized. This position is performed remotely using online tools and communication platforms. Key Responsibilities - Research travel options based on client requests and preferences - Assist with coordinating reservations for accommodations, cruises, tours, transportation, and vacation packages - Communicate with travel suppliers regarding availability, reservation details, and travel information - Provide general destination and travel-related information to clients - Respond to inquiries through email, phone, and online communication platforms - Maintain accurate records and documentation related to travel arrangements - Follow established company procedures and service standards Qualifications - Strong communication and customer service skills - Excellent organizational and time-management abilities - Attention to detail and accuracy when handling information - Comfortable using computers, web-based platforms, and online communication tools - Reliable internet access and ability to work in a remote environment - Must be at least 18 years of age and authorized to work in your location - Previous customer service, administrative, hospitality, or travel-related experience is helpful but not required Benefits - Remote work environment - Training and onboarding support - Access to travel industry resources and supplier networks - Ongoing professional development opportunities - Flexible scheduling options based on business needs

• Stand up and own the monitoring platform, utilizing Query Store across databases, wait-statistics, file-I/O baselines, system health custom Extended Events sessions, and the performance dashboard • Define and continuously tune alerting against established baselines to ensure alarms are trusted and acted upon • Lead incident triage across the database estate • Own the post-incident root-cause review process to drive issues to permanent resolution • Author and maintain operational runbooks and establish a reliable on-call response practice • Diagnose and remediate top resource-consuming and lock-holding queries using Query Store, procedure stats, and execution plan analysis • Identify and resolve CPU pressure, Tempdb contention, memory-grant waits, and I/O bottlenecks via wait statistics and DMVs • Refactor and harden high-impact stored procedures and queries to improve concurrency and reduce contention • Own the index strategy, including usage analysis, fragmentation maintenance standards, and the disciplined evaluation of missing-index recommendations • Own core production operations, including backups, recovery, patching, high availability, capacity planning, and the security baseline • Coordinate broader database initiatives across engineering and reporting teams, reporting status and risk directly to the CIO