• The Process Safety Engineer is responsible for developing, facilitating, implementing, and sustaining process safety programs that support safe, reliable, and compliant manufacturing operations. • This role provides technical leadership and expertise in process hazard analysis, risk management, engineering standards, and capital project execution while supporting the organization's Process Safety Roadmap. • Lead and facilitate process hazard analyses (PHAs), risk assessments, and hazard reviews for capital projects and targeted manufacturing processes. • Identify process safety risks and recommend mitigation measures to reduce operational and project-related hazards. • Support the implementation and closure of action items resulting from hazard evaluations and risk assessments. • Develop, maintain, and continuously improve process safety standards, procedures, and best practices that align with corporate process safety objectives and the Engineering Process Safety Roadmap. • Collaborate with engineering, operations, and EHS teams to integrate process safety principles into business processes. • Provide process safety technical expertise to capital project teams throughout project design, development, and execution phases. • Review engineering designs and project documentation to ensure compliance with process safety requirements and standards. • Partner with Environmental, Health, and Safety (EHS) teams to plan and conduct process safety audits and assessments.

• Serve as a trusted engineering advisor to member cooperatives by clarifying objectives, understanding operational constraints, and translating needs into practical engineering approaches and phased roadmaps • Lead discovery conversations with engineering, operations, and leadership stakeholders to define problems, constraints, decision criteria, and success measures; document findings in clear, action-oriented summaries • Communicate complex technical concepts in decision-ready language for both technical and non-technical audiences, including executive-level briefings and board-ready materials • Execute and/or review distribution planning and power system studies, including protection and coordination, arc-flash, fault duty, voltage management and optimization, and power quality assessments, with clear mitigation recommendations • Develop study scopes, assumptions, and methodologies that reflect cooperative realities and align recommendations with implementable next steps • Provide distributed generation and interconnection planning support, including screening, system impact evaluations, and mitigation options for generators, batteries, and behind-the-meter resources. • Support the development and improvement of member DG processes by creating repeatable engineering screens, standard work, data requirements, timelines, and templates • Lead reliability and system modernization planning, including feeder improvement concepts, device strategies (reclosers, sectionalizers, DA devices), and integration considerations for SCADA and field automation • Partner with member teams to translate reliability goals (e.g., SAIDI/SAIFI) into prioritized, fundable portfolios of projects and operational improvements • Contribute to wildfire risk mitigation planning by aligning engineering approaches to risk reduction outcomes, coordinating with internal advisory resources and external partners as needed • Provide owner’s engineer support on select projects, including design and study reviews, validation of assumptions, procurement/specification input, and implementation oversight • Own end-to-end delivery of assigned projects, including scoping, scheduling, internal coordination, quality assurance, and timely completion of deliverables • Produce high-quality, defensible technical deliverables such as models, memoranda, reports, and diagrams suitable for reuse and audit • Support development and refinement of engineering service offerings through standard scopes, estimating tools, reusable templates, and “starter packages” that improve consistency, utilization, and speed to launch • Identify opportunities to extend or deepen member engagements and coordinate with advisory teams to support continuity from assessment through planning, engineering, and implementation • Other duties as assigned

• Modify or create resources in cloud environments (AWS and Azure); • Modify or create new resources in Databricks; • Modify or create new application resources in Kubernetes; • Propose and implement architectural improvements; • Implement controls related to LGPD (Brazil's General Data Protection Law) in the data lake; • Implement dashboards and metadata analyses in Databricks for control and compliance; • Conduct audits together with the governance team to align the data lake with the company's security policies; • Monitor and analyze costs to identify bottlenecks and cost-reduction opportunities; • Collaborate with data analytics and AI teams to optimize jobs and resource usage; • Work together with other platform engineers to assist in skills development; • Serve as a technical point of reference for platform-related questions for data, business, and product stakeholders.

Role Description As a senior member of Tensordyne’s ASIC team, you will lead all phases of ASIC verification and will be responsible for the pre-silicon correctness of Tensordyne’s next-generation family of processors for generative AI inference acceleration. This ASIC’s design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to deliver the high-performance multi-chip silicon solutions that are at the heart of Tensordyne’s vertically integrated, generative AI inference acceleration systems for data centers. - Work closely with design engineers to stay abreast of the specification and implementation of ASIC blocks. - Develop comprehensive test and coverage strategies. - Implement the verification environment and tests using object-oriented tools, particularly SystemVerilog and UVM. - Handle bug tracking and coverage convergence. - Develop scripts and methodologies for the front-end ASIC flow. - Ensure the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP blocks. - SoC/Subsystem verification of embedded CPUs such as ARM/RISC-V and interconnect subsystem (including C and assembly diag validation). - Lead verification planning from architecture through tapeout. - Develop block-level, sub-system and full-chip verification environment and tests to implement test plans. - Establish reusable verification methodologies and frameworks - scale testbenches to subsystem and full chip environments. - Work closely with design and architecture teams to understand the functional and performance goals of the design. - Triage and debug functional and performance issues with the design-under-test. - Drive verification signoff criteria and quality metrics - handle bug tracking, coverage convergence, regression failures. - Mentor and technically guide verification engineers helping them through test planning and verification closure. - Perform diagnostic and post-silicon validation tests in the lab. Qualifications - 4-8 years of ASIC verification experience - having taken multiple chips through the entire cycle of verification and post silicon validation. - Expert in System Verilog, UVM, Constraint Randomization, Functional Coverage. - Experience in C/C++ or System-C. - Deep understanding of object-oriented programming principles, constrained random stimulus, and coverage driven verification approach. - Verification experience of high-speed interfaces (PCIe, Ethernet, DDR/HBM, SerDes, etc.). - Scripting experience (Python, Perl, TCL, shell programming) highly-desirable. - Interest to explore AI architectures for convolution, transformer and other kinds of workloads. - Self-starter and highly-motivated to work in a dynamic start-up environment. - B.S. (M.S. preferred) degree in Electrical or Computer engineering (or similar field). Benefits - Ground floor opportunity with the team; be part of shaping one of the most exciting new companies. - Learning and development opportunities from a highly diverse and talented peer group, including experts in a wide range of fields, from Artificial Intelligence & Computer Vision to Systems & Device Engineering. - Competitive benefits package including Medical, Vision, Dental. - Perks including meals, snacks, drinks and us! - Sharp, motivated co-workers in a fun office environment. - Flexible work hours & generous PTO policy.