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SOFTSWISS

Winning combination of software products for iGaming

Senior Systems Engineer – Security Team

Systems EngineerSystems EngineerFull TimeRemoteSeniorTeam 1,001-5,000H1B No SponsorCompany SiteLinkedIn

Location

Poland

Posted

48 days ago

Salary

0

Seniority

Senior

Job Description

Senior Systems Engineer – Security Team

SOFTSWISS

• Design, deploy, and maintain the security team infrastructure. • Ensure high availability and reliability of security platforms through proactive monitoring, alerting, and capacity planning. • Manage and evolve cloud infrastructure across datacenter dedicated servers and cloud providers. • Automate routine operational tasks: provisioning, configuration management, patching, and secret rotation. • Troubleshoot and resolve infrastructure incidents as the primary technical owner. • Maintain infrastructure documentation: architecture diagrams, runbooks, and change logs. • Collaborate with security engineers to ensure underlying platforms meet tooling and integration requirements.

Job Requirements

  • 5+ years of hands-on Linux system administration experience in production environments
  • Deep expertise in Linux internals: systems, networking stack, storage, performance tuning
  • Solid understanding of networking fundamentals: TCP/IP, DNS, TLS, routing, firewalling (iptables / nftables)
  • Experience with bare-metal and dedicated server environments (Hetzner or similar providers)
  • Hands-on experience deploying, operating, and hardening Kubernetes clusters in production, including cluster lifecycle management, CNI networking (Cilium preferred), storage, RBAC
  • Experience deploying, configuring, and operating ClickHouse and PostgreSQL in a production environment
  • Hands-on experience operating and maintaining Keycloak in production, including HA setup, backend management, realm/client configuration
  • Understanding of identity protocols: OIDC, SAML 2.0, OAuth 2.0
  • Hands-on experience operating infrastructure across cloud platforms and dedicated servers, including compute, networking, storage, and cost optimisation
  • Proficiency in Infrastructure as Code: Terraform, SaltStack, Ansible
  • Strong scripting skills: Python and/or Go for automation and operational tooling
  • Experience building and maintaining monitoring stacks: Prometheus, Grafana, Alertmanager
  • Familiarity with log management and aggregation: Vector, Loki, or ELK
  • Clear and structured written and verbal communication skills
  • Upper-Intermediate (B2) or higher English level.

Benefits

  • Full-time remote work opportunities and flexible working hours
  • Private insurance
  • Additional 1 Day Off per calendar year
  • Sports program compensation
  • Comprehensive Mental Health Programme
  • Free online English lessons with a native speaker
  • Generous referral program
  • Training, internal workshops, and participation in international professional conferences and corporate events.

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THE COMPANY Established in early 2024, at Analogue Insight we are bridging the Analogue and Digital Worlds for Tomorrow through our Chiplet Solutions. Our core expertise lies in developing cutting-edge Chiplet technology that serves as the building block for advanced communication systems. Our Chiplets are designed to offer high performance, scalability, and integration flexibility, enabling our clients to achieve breakthroughs in computation speed, data processing, and connectivity. For more information about us, check out our website (Analogue Insight) and LinkedIn Page (Analogue Insight™: Overview | LinkedIn). THE ROLEWe are seeking a highly skilled and experienced System Design Engineer (Modelling & Architecture) to play a key role in architecting and validating high-performance serial links and data-converter systems for our state-of-the-art chiplet solutions. You will directly shape the system architecture and behavioural models of customer-facing IP, driving early design decisions, performance exploration, and architectural trade-offs across SerDes, ADC/DAC, and PLL subsystems. This role is ideal for engineers with strong modelling expertise and system-level thinking, who enjoy bridging architecture and implementation in a fast-moving, high-impact environment. Hiring Manager: Christian Borelli, Founder and CSO KEY RESPONSIBILITIESSystem Architecture & Modelling:Define and develop system-level architectures and behavioural models for high-speed links and mixed-signal subsystems, including SerDes, ADCs, DACs, and PLLs. High-Level Modelling (MATLAB / Simulink):Build and maintain accurate system models in MATLAB/Simulink to evaluate performance, explore trade-offs, and guide design decisions across noise, jitter, bandwidth, and power. SerDes System Modelling:Develop end-to-end link models including channel, equalization (FFE/DFE), jitter budgets, and clock and data recovery (CDR) behaviour. ADC/DAC Modelling & Calibration:Model data converter architectures and implement advanced calibration algorithms (e.g. background calibration, mismatch correction, linearity enhancement), assessing system-level impact on ENOB, SFDR, and dynamic performance. PLL & CDR Behavioural Modelling:Develop behavioural models for PLLs and CDR loops, including phase noise, jitter transfer, loop dynamics, and locking behaviour. Cross-Domain Collaboration:Work closely with circuit designers, digital teams, and system architects to translate system requirements into block-level specifications and ensure model-to-silicon correlation. Performance Analysis & Optimization:Analyze system performance and identify architectural improvements across latency, power, robustness, and scalability. Verification Strategy Support:Contribute to system-level verification strategies and support correlation between behavioural models, RTL, and silicon measurements. Technology & Competitive Awareness:Stay current with industry trends in high-speed interfaces, data converters, and chiplet-based architectures, including benchmarking against competitive solutions. Documentation & Knowledge Transfer:Produce clear and structured documentation of models, assumptions, and architectural decisions to enable efficient collaboration and reuse. WHAT WE’RE LOOKING FOR Must-have Technical Skills: - M.S. or Ph.D. in Electrical Engineering or related field - 8–12+ years of experience in system design and modelling of high-speed or mixed-signal systems - Strong expertise in SerDes system architecture and modelling - Proven experience with MATLAB and Simulink for system-level modelling - Solid understanding of ADC/DAC architectures and calibration techniques - Experience in PLL and CDR modelling, including jitter and loop dynamics - Good understanding of mixed-signal implementation constraints in advanced CMOS nodes - Familiarity with link-level metrics: BER, eye diagrams, jitter budgets, equalization techniques - Ability to bridge system modelling with circuit and RTL implementation Nice-to-have: - Experience with UCIe or chiplet-based architectures - Exposure to behavioural modelling in SystemVerilog or real-number modelling (RNM) - Prior silicon correlation or lab validation experience Soft & Professional Skills: - Clear, structured communication in professional English - Strong system-level thinking and abstraction capability - Collaborative, cross-functional mindset - Ability to mentor and guide junior engineers - High ownership and accountability - Curious and proactive approach to problem-solving OUR CULTURE We’re a fully remote team of around 25 people distributed across the UK, Armenia, Italy, the US, Estonia, India, and beyond. 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If you don’t meet every requirement but feel excited about the role, apply anyway. We value curiosity, integrity, and potential as much as experience.

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