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Microelectronics for Critical Systems.
Lead FPGA Architect
Location
Ohio
Posted
122 days ago
Salary
0
Seniority
Senior
Job Description
Lead FPGA Architect
Niobium Microsystems
• Lead the Porting Effort: Take Ownership of porting our existing ASIC RTL to the AMD Alveo V80 • Ensure the design is scalable, parameterizable, and optimized for the Versal HBM architecture • Architect the RTL to support a unified codebase for both FPGA and ASIC targets • Implement abstractions for memory, clocking, and resets that allow for seamless migration between programmable logic and custom silicon • Optimize the CKKS FHE data path, including: NTT, KeySwitching, and Base Conversion to exceed the performance of state-of-the-art GPU implementations • Use the FPGA platform as an iterative testbed to validate code and architectural improvements for future generations of our hardware • Resolve the current team's challenges with debugging and toolchain experience • Implement robust hardware debugging strategies using Vivado Hardware Manager, ILA cores, and Vitis emulation flows • Take full responsibility for achieving timing closure on high density Versal designs • Optimize the design for resource utilization (LUTs, DSPs, URAM) and power efficiency • Architect and tune the Versal Programmable Network-on-Chip (NoC) to prioritize high bandwidth data movement between HBM2e and the PL fabric • Initially lead backend and frontend engineering efforts, then assist in hiring and technical leadership of a multi-disciplinary team (Backend, Frontend, DevOps, Customer Support) to support growth from 5 pilot users to thousands of concurrent users • Ensure the infrastructure meets enterprise-grade standards from day one, preparing the platform for HIPAA, SOC2, and GDPR compliance
Job Requirements
- 10+ years of experience in FPGA design and development, with at least 5 years specifically in high-performance computing (HPC) or hardware acceleration
- Deep experience with the AMD Vivado/Vitis toolchain and the Alveo Versal Example Design (AVED)
- Mastery of SystemVerilog or Verilog for complex SoC design
- Experience implementing complex arithmetic algorithms (e.g., FFT, NTT, modular arithmetic) in hardware
- Strong knowledge of high-speed interfaces, including PCIe Gen4/Gen5, AXI4, and HBM2e
Benefits
- Competitive salaries
- Equity in the form of Incentive Stock Options (ISO)
- Employer paid medical insurance plan
- Health Savings Account (HSA) with employer contributions
- Dental and vision reimbursement account (HRA)
- 401(k) retirement plan with employer match
- Flexible work location with remote options
- Flexible time off
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