Role Description We are sharing a specialised part-time consulting opportunity for US-based ASIC and SoC engineers with hands-on experience in RTL design, functional verification, hardware debugging, IP integration, timing closure, or production silicon development. This role supports an advanced AI initiative focused on improving how models understand and solve real-world semiconductor engineering problems. Selected engineers will: - Create realistic chip design and verification tasks. - Develop complete reference solutions using SystemVerilog or Verilog. - Evaluate model-generated responses. - Apply practical engineering judgment gained through design, debugging, verification, and tapeout workflows. Qualifications - Hands-on experience in ASIC or SoC design, functional verification, formal verification, or related semiconductor engineering. - Strong fluency in SystemVerilog, Verilog, or both. - Experience with production silicon, tapeout, IP development, chip integration, or subsystem verification. - Solid knowledge of interface protocols, handshaking, backpressure, multiple clock domains, and multi-module dataflow. - Experience working independently on complex design or verification problems. - Strong written communication and the ability to explain hardware engineering decisions clearly. - Reliable availability for approximately 20–40 hours per week. Requirements - A degree in electrical engineering, computer engineering, electronics engineering, computer science, or a related technical field is highly relevant. - Graduate students, recent graduates, and experienced industry professionals may all be considered. - Advanced academic or professional work in digital design, semiconductor systems, computer architecture, or verification is valuable. - Equivalent hands-on engineering experience may also be considered. Benefits - Apply practical semiconductor engineering expertise to advanced AI development. - Create realistic tasks grounded in actual chip design and verification work. - Evaluate how AI systems approach complex RTL, debugging, and hardware-reasoning problems. - Collaborate with engineers across multiple ASIC and SoC specialisations. - Work remotely with a flexible part-time commitment and competitive hourly compensation. Contract Details - Part-time W-2 contingent employment arrangement. - Fully remote role available to candidates based in the United States. - Expected commitment of approximately 20–40 hours per week depending on availability. - Candidates should have confirmed availability without scheduling conflicts. - Competitive rates between $65–$95 per hour depending on expertise and project scope. - Work may include onboarding, technical calibration, task development, model evaluation, and peer review. - Project scope, workload, and duration may be adjusted according to programme requirements and performance.

Role Description Schneider Electric's Digital Power commercial organization is hiring a Digital Power Hardware Specialist to own and grow the Digital Power hardware business across the eastern half of the United States through the eOEM go-to-market. This is a commercial role with a technical edge - built for someone who knows power hardware, understands how eOEM customers buy, and can manage a named account portfolio while developing new business in one of the fastest-growing segments in the industry. The eOEM segment is being driven by the explosive growth in data center construction, AI infrastructure, and advanced manufacturing. This role puts you at the center of that opportunity, with dedicated ownership of a focused account list, direct engagement with distribution partners and eOEM end users, and a clear path to grow with the business. What will you do? - Named Account Portfolio: - Act as the Digital Power Hardware Specialist for a named portfolio of eOEM accounts in the West Region (typically up to ~10 accounts). - Own DP hardware account activities for named accounts: SPA coordination, channel and distributor management, LOQ and forecast management, and Digital Power product expertise. - Coordinate with distribution partners on stocking agreements, LOQ (Large Order Quantity) processes, lead time management, and order execution. - Segment Development: - Serve as a Digital Power hardware resource for eOEM accounts in the segment that fall outside the named list. - Amplify the proximity team's capability on hardware-intensive eOEM opportunities. - Hardware SME & Team Resource: - Serve as the go-to hardware subject matter expert for the West eOEM commercial team. - Support proximity and solution architecture teammates with technical hardware guidance on eOEM opportunities outside the named account list. Qualifications - 3+ years of experience in hardware sales, industrial distribution, channel management, or eOEM commercial roles. - Working knowledge of power products — metering, switchgear, relays, UPS, or related electrical hardware. - Experience managing accounts in a distribution or OEM environment, including channel coordination and pricing (SPAs, LOQ). - Strong organizational skills and comfort managing multiple accounts, priorities, and internal stakeholders simultaneously. - Proficiency in CRM tools (Salesforce/BFO preferred) and a track record of forecast accuracy. - Familiarity with Schneider Electric products and commercial processes is a plus — but not required. Benefits - Medical (with member reward points), dental, vision, and basic life insurance. - Benefit Bucks, flexible work arrangements, paid family leaves, well-being programs. - 12 holidays per year, and 15 days of paid time off per year. - Competitive pay and programs including base salary, incentives, company share ownership, and 401(k) with match. - Support development through performance discussions, global opportunities, the Schneider Career Hub, and learning platforms like Coursera. - Encouragement of collaboration, recognition, sharing your voice, and an inclusive workplace. - Volunteer leave, programs with the Schneider Electric Foundation, youth education initiatives, and military leave benefits.

Role Description We are looking for a Power Integrity Engineer to design, simulate, validate, and support advanced power delivery and power distribution solutions for next-generation data center infrastructure. This position will be a contract and remote. What You’ll Do - Design, validate, and characterize power conversion and power delivery systems for large-scale data center infrastructure - Develop power distribution products, including cables, connectors, and bus bars for high-voltage, high-current server rack and data center applications - Create and execute simulation models and validation plans to assess power integrity performance - Correlate simulation results with laboratory measurements to verify model accuracy and product performance - Collaborate with vendors to specify, procure, and validate new product designs - Measure and characterize AC response, parasitics, impedance, and other electrical parameters of power products - Perform hands-on testing, debugging, root cause analysis, and issue resolution for electrical systems - Prepare technical documentation, validation reports, and design recommendations - Lead development projects and collaborate with cross-functional engineering teams - Partner with customers to understand technical requirements and align internal product development efforts Qualifications - Bachelor’s degree in Electrical Engineering, Physics, or a related technical discipline - 8-10+ years of electrical engineering work experience and 5+ years experience in power conversion and distribution - Strong understanding of Signal Integrity (SI) and Power Integrity (PI) principles - Experience using electrical design and simulation tools such as SPICE, Allegro, PowerDC, and Ansys Q3D - Knowledge of voltage converter architectures and power delivery systems - Hands-on experience with laboratory equipment including network analyzers, oscilloscopes, signal generators, and related test equipment - Ability to perform simulation, testing, validation, and root cause analysis for complex electrical systems - Strong communication skills with the ability to present technical concepts to both technical and non-technical audiences - Ability to build effective relationships with customers, vendors, and cross-functional teams - Self-motivated with the ability to work independently in a geographically distributed environment - Willingness and ability to travel up to 25–30% Requirements - Experience designing and manufacturing power delivery products - Experience supporting data center infrastructure and high-performance computing applications - Familiarity with high-voltage, 3-phase electrical systems - Experience developing solutions for advanced server rack power architectures - Proven ability to lead technical projects and influence cross-functional stakeholders Benefits - $82 per hour - Medical, dental, and vision insurance - 401k retirement account access - Paid sick leave and/or other paid time off as provided by applicable law

Role Description This Hardware Engineering position is located in San Jose, CA, and is open to remote applicants residing within the United States. We are seeking a highly qualified Signal and Power Integrity Technical Lead to help us develop our next generation ASIC packaging to help define, design and verify ASIC packaging to be deployed in a range of Cisco platforms. - Develop, document, and implement design rules for ultra-high-speed signaling, ensuring power, performance, and area goals are met for products. - Analyze substrate signal integrity (SI) and power integrity (PI), providing feedback and collaborating with the layout team to develop optimal solutions across interposer, substrate, and PCB. - Design, document, and develop ASIC packages for high-volume, high-quality release, including post-layout extraction and reporting. - Collaborate with system partners, vendors, and design leads to achieve combined power and signal integrity and to resolve complex technical issues using advanced technology design rules. - Define the processes, methods, and tools for the design and implementation of complex ASIC/package developments. - Lead or participate in chip architecture discussions and the definition, architecture, and design of high-performance ASICs, including reviews of intricate IC and analog/mixed-signal circuit designs. - Mentor and support the signal integrity team, junior engineers, and influence packaging/hardware teams, ensuring all technical specifications and innovative solutions are met. - Develop and promote a culture of design reviews, postmortems, and continuous improvement across multi-disciplined engineering teams. Qualifications - Bachelor's degree in Electrical Engineering and 8+ years of relevant signal and power integrity experience, or Master's degree in Electrical Engineering and 6+ years of relevant signal and power integrity experience, or PhD in Electrical Engineering and 3+ years of relevant signal and power integrity experience. - High-Speed Design & Theory: Expertise in high-speed design principles, including Transmission Line Theory, electromagnetics, scattering parameters, and impedance network analysis, applied to 56G PAM4 SerDes architectures, channel modeling, and BER prediction. - SI/PI Simulation Proficiency: Experience with pre- and post-layout signal and power integrity (SI/PI) simulations using industry-standard EDA tools such as Cadence Sigrity, Ansys HFSS, and Keysight ADS. - Layout Review & Physical Validation: Experience conducting detailed layout reviews and physical design validation using tools such as Cadence APD and Ansys EM flows to ensure signal performance and crosstalk mitigation. - Circuit Analysis: Working knowledge of SPICE for circuit-level analysis, signal modeling, and performance validation. Requirements - Skilled in articulating ideas and technical concepts to diverse audiences, both verbally and in writing. - Experience with high-bandwidth memory (HBM) or high-speed memory interface SI. - Experience with die-to-die interfaces (UCIe or proprietary). - Experience with advanced packaging (CoWoS, EMIB, interposer-based designs), including SI/PI analysis of 2.5D ASIC packaging. - Working knowledge of Vector Network Analysis. - Basic knowledge of IBIS. Benefits - Medical, dental and vision insurance. - 401(k) plan with a Cisco matching contribution. - Paid parental leave. - Short and long-term disability coverage. - Basic life insurance. - 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees. - 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco. - Non-exempt employees receive 16 days of paid vacation time per full calendar year. - Exempt employees participate in Cisco’s flexible vacation time off program. - 80 hours of sick time off provided on hire date and each January 1st thereafter. - Optional 10 paid days per full calendar year to volunteer.