• Identify and drive Critical Item and Technology (CIT) action plans to closure throughout hardware development to increase product and process maturity during the development phase on a program • Lead implementation of NPI requirements, including Design‑to‑Cost, Design for Excellence/Producibility, prototyping, and supplier technical risk mitigation on a program • Develop and document the Producibility and Prototyping strategy within the Hardware Development Plan on a program • Ensure timely and effective execution of Producibility, Prototyping, and Supplier Technical Support activities starting in development and into early production on a program • Support or facilitate Design for Manufacturing and Assembly (DFMA) workshops to identify Cost Reduction Opportunities (CROs) and drive execution of Cost Reduction Initiatives (CRIs) on a program • Baseline and monitor risks and opportunities related to predictive manufacturing yield, cost, and throughput for Critical Items and Technologies using Valor DFM, PCAT Pro, DFMPro, Siemens VSA, CETOL, and other hardware optimization tools on a program • Drive identification of Critical and Key Characteristics and implement/manage production Control Plans to manage technical risks to production on a program • Ensure robust supplier capability assessments, supplier selection, technical requirements understanding, and production readiness on a program to meet cost, quality, and schedule needs • Deliver proactive supplier support by conducting onsite visits, driving clear communication between stakeholders and suppliers, resolving supplier requests and manufacturing defects, and reviewing supplier data and lessons learned to advance continuous improvement in manufacturing, assembly, test, and inspection • Serve as a liaison between CPR Section Leaders, Program CEs, IPTLs, Producibility Engineers, and cross‑functional teams to maintain consistent communication, alignment, and program execution • Collaborate with the CE, IPTLs, and REAs to prepare for NPI assessments and manage associated actions on a program • Compile producibility artifacts, generate memos, and present producibility analysis to the customer when contractually required

• Lead development of controller and display platforms. • Build and mentor a high-performing hardware engineering team. • Ensure successful development of new products from concept through production introduction. • Manage progress, risks, schedules, and deliverables. • Oversee hardware/firmware testing and apply APQP methodologies. • Communicate development status and risk mitigation plans to senior leadership.

• Own the BLE Stack: Architect, implement, and maintain the Bluetooth connectivity layer across our Pod ecosystem. Define GATT services, characteristics, and connection strategies that deliver reliable, secure, and power-efficient communication. • Optimize for Always-On Devices: Drive radio-on time, advertising intervals, connection parameters, and PHY selection while maintaining low-latency sync of biometric data. • Ensure Bulletproof Interoperability: Deliver a connectivity experience that "just works" across the long tail of iOS and Android devices, OS versions, and real-world RF environments. Use sniffers, protocol analyzers, and on-device telemetry to root-cause cross-stack issues with mobile and Pod gateway teams. • Ship and Sustain OTA at Scale: Design and harden the secure OTA DFU pipeline so we can confidently push firmware to a global fleet of devices with low friction and zero bricks. • Bring Up New Silicon: Partner with hardware teams on board bring-up, antenna tuning, regulatory certification (FCC/CE/Bluetooth SIG qualification), and silicon-vendor stack integration for our Nordic-based platform. • Global Collaboration: Work closely with our manufacturing partners in China to develop RF and BLE production tests, ensuring we ship high-quality, fully-validated devices on time. • Effective Remote Communication: Thrive in a hybrid in-person and remote work environment, ensuring clear and impactful communication across firmware, mobile, hardware, and ML teams.

• Lead the full lifecycle of complex multi-layer PCB design (from initial technical specifications to mass production release) with minimum board design cycles. • Develop schematics design for CPUs, high-performance Marvell packet processors, and system-on-chip (SoC) architectures. • Design and integrate high-speed digital interfaces: SerDes, PCI-e, Ethernet, DDR2/3/4, and MII/GMII. • Manage service and management interfaces including I2C, SMI, and SPI. • Design and calculate robust power circuitry, including high-efficiency DC/DC converters and Power Integrity (PI) management. • Provide layout support and strict guidelines for PCB Layout Designers, ensuring top-tier Signal Integrity (SI). • Conduct laboratory bring-up, hardware debugging, validation, and testing using professional equipment (Oscilloscopes, Signal Generators, Power Analyzers).