Role Description We are seeking an experienced Senior Architectural Technician to join our offshore team. This is a specialized role requiring deep knowledge of New Zealand documentation standards. You will work under the guidance of a NZ-based Senior Architect to produce technically accurate, consent-ready drawing sets. Note: This is not an entry-level position. We require a professional with a proven track record in the NZ market who can operate independently within a distributed team. Responsibilities - Produce high-quality architectural documentation for NZ aged care and multi-unit residential projects, including drawings suitable for consenting and construction. - Work under the direction of a NZ-based Senior Architect, taking clear ownership of assigned documentation packages and deliverables. - Prepare and coordinate drawing sets including floor plans, elevations, sections, and construction details in line with NZ Building Code and relevant NZ standards. - Develop and maintain Revit models ensuring consistency and coordination across all documentation outputs. - Manage and coordinate project files and documentation workflows using Autodesk Construction Cloud and Bluebeam Revu. - Liaise effectively with local consultants and suppliers as required to ensure documentation accuracy and project alignment. - Identify and resolve technical issues within documentation packages proactively and with minimal supervision. - Maintain a professional remote working environment with reliable connectivity and a consistent standard of output. Qualifications - Architectural Technology qualification or equivalent — Diploma, Bachelor, or a recognised technical qualification. - Minimum 5 years of post-qualification experience in architectural documentation. - Minimum 2 years of documented offshore delivery experience working with a New Zealand or Australian architectural practice — portfolio evidence of documentation produced for NZ consenting and construction is required. - Solid working knowledge of the New Zealand Building Code, NZ standards, and NZ project delivery models. - Demonstrated ability to take responsibility for a documentation package and communicate effectively with local consultants, contractors, and suppliers. - Proficient in Revit, Autodesk Construction Cloud, and Bluebeam Revu — all three platforms are essential to this role. - Strong written and verbal English communication skills sufficient to operate effectively in a distributed team environment. - Reliable high-speed internet connectivity and a professional, dedicated remote working setup. Preferred Skills - Project experience in aged care, retirement village, or multi-unit residential typologies — strongly preferred given Ignite's primary project portfolio. - Masterspec specification authoring experience. - Navisworks experience for model coordination and clash detection. - Direct prior experience working with NZ consultants, contractors, and/or councils — even in a remote capacity. - Commitment to ongoing professional development through industry engagement or continuing education.

• You’ll help build and evolve the visual identity of multiple B2B shows, ensuring strong brand positioning, scalable design systems, and high-performing episode packaging. • Building full brand identity systems for new podcast launches (logo, typography, color systems, cover art, visual direction) • Refreshing existing podcast brands to improve relevance, positioning, and consistency • Designing YouTube thumbnails that are performance-minded, CTR-aware, and built within scalable systems • Creating moodboards and visual exploration decks for new show concepts and brand pitches • Partnering with producers and strategists to align visual direction with show positioning and audience goals • Building repeatable visual systems that scale across dozens of episodes without losing brand consistency • Using AI-assisted design workflows (Midjourney, Photoshop, etc.) to improve speed, ideation, and production quality

• As part of our architecture team — three people in total — you will integrate architecture across various parts of the group. • Together we plan and drive interoperability and migration of systems toward beyonnex, and we shape the technical direction on which engineering teams build. • We act as a bridge between product requirements and the technical capabilities of our systems — we highlight trade-offs, remove blockers, and keep product and engineering aligned. • Enable the creation of technical concepts together with engineering teams and propose them yourself when that is the fastest way forward, always open to feedback and discussion. • Contribute to our technical strategy and architectural vision to ensure today's decisions don't box us in tomorrow. • Stay hands-on when it matters — pair with engineers on difficult problems, prototype, and review critical designs. • Collaborate with our dedicated AI, infrastructure, and other capability teams as active stakeholders — shape what they build and help enable its use across the organization, including ourselves.

Role Description As the HSIO Architect, you will own the high-speed interface architecture across the various product families. You will drive decisions from SerDes architecture to UCIe die-to-die integration, working directly with the Head of Engineering, digital leads, and analog teams. You will also serve as the technical interface to key IP vendors (UCIe PHY, SerDes), foundry partners, and anchor customers. This is not an IP integration role. We need someone who can define the architecture, validate the tradeoffs, and guide execution through tape-out. Key Responsibilities - Architecture & Definition - Define high-speed IO architecture for PCIe/Ethernet-224G/448G scale-up fabric/CPO-optics to electrical interfaces. - Define die-to-die interface architecture for UCIe integration: flit formats, credit-based flow control, sideband management, and latency targets. - Architect the SerDes-to-photonics interface, retimer integration, and co-packaged optics (CPO) readiness. - Own the signal integrity budget: TX/RX equalization, channel loss allocation, crosstalk margins, and jitter decomposition across the full channel. - Implementation Oversight - Guide SerDes PHY selection and evaluation; assess vendor IP (custom vs. licensed), and establish integration requirements. - Define and review UCIe PHY integration: bump map, power domain partitioning, analog/digital co-design requirements, and pad ring architecture. - Collaborate with digital architecture lead on protocol bridge design — PCIe TLP ↔ UCIe flit conversion, flow control, error handling. - Drive DFT and compliance test architecture for PCIe certification and UCIe conformance testing. - Establish PVT margin strategies and power management per-lane DVFS, shutdown sequences, and IVR chiplet coordination. - Customer & Ecosystem Engagement - Serve as primary technical interface to anchor customers and engaging hyperscaler architecture teams (AWS, Google, Microsoft, Meta) to validate product definition against platform requirements. - Roadmap & IP - Contribute to RTL reuse strategy — enabling derivative roadmap SKUs with minimal re-spin. - Identify and scope patentable innovations in UCIe integration, adaptive equalization, and multi-protocol bridge architectures. Qualifications - 15+ years in high-speed interface architecture; 5+ years at Principal level or higher in a fabless or IDM semiconductor environment. - Deep expertise in PCIe architecture — from PHY layer through controller and protocol stack; direct tape-out experience strongly preferred. - UCIe standard familiarity — flit-based transport, sideband protocol, and die-to-die integration in 2.5D/3D packages. - Signal integrity expertise: S-parameter analysis, channel simulation (HSPICE/IBIS-AMI), eye diagram closure, and crosstalk budgeting. - Experience with advanced nodes and advanced packaging (CoWoS, EMIB, InFO). - Track record of driving complex multi-party IP integrations from architecture through tape-out. Preferred Qualifications - Experience with 224G/400G+ SerDes architectures for scale-up AI fabric (NVLink, UALink, Ultra Ethernet, or proprietary). - Familiarity with electrical-optical co-design for CPO or near-package optics; EIC retimer or photonic interface experience. - Prior work in chiplet-based multi-die architectures — bumping strategy, KGD handling, heterogeneous integration. - PCIe-SIG membership or active contribution to UCIe Consortium working groups. - Prior startup experience or comfort with early-stage ambiguity and fast-paced execution.