Arrow Electronics logo
Arrow Electronics

Five Years Out

FPGA Design Engineer

Hardware EngineerHardware EngineerOtherRemoteMid LevelTeam 10,001+Since 1935H1B SponsorCompany SiteLinkedIn

Location

United States

Posted

99 days ago

Salary

$95.9K - $203K / year

Seniority

Mid Level

Job Description

FPGA Design Engineer

Arrow Electronics

Position: FPGA Design Engineer Job Description: Location: Mountain View, CA (Remote) What will you do: - Strong expertise on Arteris/ NOC Design Toolset - At-least 5+ years of experience in Verilog Design - AMBA AXI bus along-with ARM or C based processor - Ensure customer satisfaction. - Reporting to customers on daily or weekly progress effectively What we are looking for: - Strong expertise along-with complex SoC/IP debug is must - At-least 5+ years of experience in System Verilog HVL and C/C++. - AMBA AXI bus along-with ARM or C based processor - Bi-frost/Processor based C and SV/UVM mix Verification. - Experience in complete verification cycle which includes development of test plan, - BFM/Driver/Monitor/Scoreboard component development and integration in test bench, - stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure. - Make/Perl/Python What’s In It for You: At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package. • Medical, Dental, Vision Insurance • 401k, With Matching Contributions • Short-Term/Long-Term Disability Insurance • Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options • Paid Time Off (including sick, holiday, vacation, etc.) • Tuition Reimbursement • Growth Opportunities • And more! About eInfochips: eInfochips, an Arrow company (Fortune #154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edgeto-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries s verticals. EEO Statement: Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy) Annual Hiring Range/Hourly Rate: $95,900.00 - $203,500.00 Actual compensation offer to candidate may vary from posted hiring range based upon geographic location, work experience, education, and/or skill level. The pay ratio between base pay and target incentive (if applicable) will be finalized at offer. Location: US-CA-San Jose, California (eInfochips) Remote work employees may be required to be present at the closest designated Arrow office for work-related purposes, at the Company’s request and sole discretion. Time Type: Full time Job Category: Engineering Services EEO Statement: Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy) We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application. In any materials you submit, you may redact or remove age-identifying information such as age, date of birth, or dates of school attendance or graduation. You will not be penalized for redacting or removing this information.

Job Requirements

  • Strong expertise along with complex SoC/IP debug is a must
  • At least 5+ years of experience in System Verilog HVL and C/C++
  • Experience with AMBA AXI bus along with ARM or C based processor
  • Bi-frost/Processor based C and SV/UVM mix Verification
  • Experience in complete verification cycle which includes development of test plan
  • BFM/Driver/Monitor/Scoreboard component development and integration in test bench
  • Stress/corner testing, failure debug, gate level simulations, assertions, and coverage closure
  • Proficiency in Make/Perl/Python

Benefits

  • Medical, Dental, Vision Insurance
  • 401k, With Matching Contributions
  • Short-Term/Long-Term Disability Insurance
  • Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
  • Paid Time Off (including sick, holiday, vacation, etc.)
  • Tuition Reimbursement
  • Growth Opportunities
  • And more!

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