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Encore Semi logo
Encore Semi

Based in San Diego, California, Encore Semi is a privately-held semiconductors and engineering services company that specializes in building expert teams, or Centers of Expertise,

Sr ASIC/RTL Design Engineer

Location

California + 1 moreAll locations: California | Canada

Posted

59 days ago

Salary

$170K - $210K / year

Seniority

Senior

Job Description

Sr ASIC/RTL Design Engineer

Encore Semi

Role Description Sr ASIC/RTL Design Engineer (NoC / Ethernet / PCIe / UCIe) – Remote - Translate high-level system requirements and customer use cases into detailed architecture and functional specifications. - Collaborate with chip and system microarchitects to align ASIC architecture with system-level goals for throughput, latency, and power efficiency. - Guide modeling and feasibility analysis of packet flow behavior through the switch datapath to validate architectural choices, including throughput, latency, power and area efficiencies. - Work closely with RTL, Verification, Physical Design and Firmware teams to ensure seamless design implementation and handoff. - Guide integration of internal and external IPs (e.g. MAC, PCIe, SerDes) into the broader architecture. Drive interface requirements. - Participate in design reviews, performance modeling, test and verification strategies and architectural trade-off analysis. - Contribute to post-silicon validation for performance and correctness. Investigate and resolve complex issues related to ASIC data path, working closely with cross-functional teams including hardware engineers, firmware developers, and system architects. Qualifications - MSEE with 10+ years of experience, preferably in networking ASIC architecture and design. - Experience in related areas of computer and parallel processing architectures – in particular, complex memory crossbars, buffering schemes, scheduling algorithms and high-speed datapaths – are also highly desired. - A deep understanding of networking protocols (Ethernet, TCP/IP, UDP, VLAN, MPLS, RoCE, etc.) and their hardware implications, or a willingness to become expert. - Demonstrated expertise in microarchitecture definition, performance modeling, and trade-off analysis. Capability to develop Architecture behavioral models is highly desired. - Experience working across the ASIC development lifecycle, from concept through productization. - Experience in high-speed I/O integration (e.g., UCIe, PCIe Gen5/Gen6, SerDes) and Software Control Plane interface architecture is highly desirable. - Understanding of physical design implications on packet processing and buffering architecture (e.g., timing, area, power). Requirements - Must be US citizen or Lawful Permanent Resident. Benefits - 15 days of PTO per calendar year - 10 paid Holidays per calendar year - Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents - Dental & Vision: Company covers 50% of premiums for Employee and Dependents - Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance - Employee Assistant Program (EAP) - 401k - Traditional & Roth - Life/AD&D and Long-Term Disability - Tuition reimbursement

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