Role Description We’re looking for a HPC GPU Pipeline Mechanic with familiarity in writing and maintaining optimised software for a variety of platforms, to help customers bring their GPU workloads to our HPC infrastructure. As a HPC GPU Pipeline Mechanic you’ll be part of a team of technical experts responsible for ensuring that customers can use our compute infrastructure as productively as possible. - Ongoing maintenance of scientific applications on EngineRoom.io's Private Cloud HPC environment - Inspection and maintenance of software written by other members of the team - Achieving a basic understanding of our customers' scientific domains - Acting as 3rd-level technical support for otherwise-unresolvable customer issues - Providing and receiving regular, constructive feedback to and from your peers - Collaborating on priority and scheduling for rapid project delivery Qualifications - Strong C/C++ skills, along with at least one GPU-targeted toolchain (ideally CUDA) - Experience using GP/GPUs for numerical processing in a commercial or academic setting - Understanding of Kubernetes, Clusters, and K8 Administration - Excellent written and spoken business and technical English, suitable for working directly with clients - Impeccable professional references Requirements - Significant expertise as a Linux user/administrator - Experience optimising for both NVIDIA and AMD GPUs, Graphcore, and Intel IPUs and x86 CPUs - A background or interest in some branch of science - Sufficient maths to be able to implement algorithms described in scientific papers Benefits - Choice of technical or organizational leadership career growth - State-of-the-art technology environment - Innovation, proof-of-concept, and first-article rapid prototype focus - Small-team workplace flexibility and work-life balance - Start-up and innovation culture

DFT Verification Engineer Who we are: We are a stealth-mode startup building foundational technology to address performance, scalability, and resiliency challenges in large-scale AI data center clusters. We are backed by top-tier VC firms and notable angel investors. The company is led by experienced builders and operators who have founded companies, taken them to scale, and exited successfully. We work with a strong sense of unity and shared responsibility, and we expect trust, integrity, and respect in how we collaborate and make decisions. We hold ourselves accountable to one another and to the quality of the work we deliver. Headquartered in Silicon Valley, we operate across a mix of remote and on-site locations in the U.S. and Canada. We aim to create an environment where people are treated fairly, supported in their growth, and are empowered to do meaningful work alongside others who take the craft seriously. What we need: An experienced DFT Verification Engineer responsible for ensuring the functionality, correctness, and quality of ASIC DFT logic. This role focuses on building robust verification environments, executing coverage-driven verification plans, and working closely with DFT design engineers and manufacturing engineers to deliver reliable, high-quality silicon. The ideal candidate has deep hands-on experience with SystemVerilog, UVM (or similar methodologies), and modern verification workflows, and is comfortable driving verification efforts from planning through closure. The ideal candidate is also knowledgeable about DFT topics such as scan/ATPG, JTAG, ijtag (ICL/PDL), boundary scan, MBIST, memory repair, and fuseboxes. Should have experience with gate-level simulation and tester pattern formats such as STIL. Key Responsibilities: - Develop, implement, and maintain RTL verification environments using UVM or equivalent methodologies - Create and execute coverage-driven verification plans aligned with design specifications - Use EDA DFT tools (e.g., TestMax, Tessent) to create and run recommended pre-silicon test cases for MBIST and scan fabric inserted by those tools - Develop directed test cases for other (non-vendor-supplied) DFT logic to validate functionality and identify corner cases - Assist in verifying ATPG patterns, especially at SOC level, along with manufacturing reset sequences - Analyze simulation results, debug complex verification and design issues, and perform root-cause analysis in collaboration with DFT design engineers - Implement and track functional and code coverage, driving verification to closure - Develop reusable verification components and write SystemVerilog Assertions (SVA) - Participate in design and verification reviews, providing input on design testability, correctness, and optimization - Automate regression testing and enhance verification infrastructure using Python and scripting - Contribute to continuous improvement of verification processes, tools, and methodologies - Along with the DFT designers, help support post-silicon test bring-up debug Required Skills and Qualifications: - Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field - 5+ years of experience in digital design verification, with at least 2 in DFT verification specifically - Strong hands-on experience with UVM-based or similar verification methodologies - Proficiency in SystemVerilog - Experience in scripting (preferably Python) and automation - Experience with industry-standard EDA tools (e.g., Synopsys VCS, Siemens/Mentor Questa, Cadence Xcelium) - Experience with industry-standard EDA DFT tools (e.g., Synopsys TestMax + Yield Accelerator, Siemens Tessent) - Solid understanding of digital design fundamentals - Experience with verification of test sequences for high-speed PHY logic including PCIe and Ethernet (10G/40G/100G) - Strong analytical and problem-solving skills - Clear written and verbal communication skills for cross-functional collaboration - High attention to detail and ability to deliver reliable, high-quality verification outcomes - Ability to work independently and manage tasks to completion Desired Skills: - Experience with change control systems, especially git - Experience verifying SoC-level designs Compensation: Target base salary for this role is $160,000 – $220,000 per year, plus meaningful equity, benefits, and 401(k). Salary ranges are determined by role, level, experience, and location.

• Designing and implementing I&C electronic hardware and software for I&C systems for Nuclear Power Plants • Prepare design specifications. • Printed Circuit Board (PCB) design using tools such as Altium. • Programable Logic Device (PLD) design. • Field Programable Gate Array (FPGA) design. • Performing simulation/module testing of design. • Performing integration testing of the design. • Documenting test results. • Creating manufacturing test procedures for designs. • Performing PLD / FPGA code reviews. • Performing Verification of Design Specifications and Reports. • Engage customers to define scope, review results, and discuss technical risks. • Work with Tech Leads to establish an effective work plan, including time estimates, schedule estimates, requirements and work processes. • Apply engineering fundamentals and 1st order engineering principles to establish and/or confirm expected performance. • Provide clear and complete analysis documentation in accordance with GE engineering procedures. • Manage time effectively to provide quality deliverables within the expected project timeline. • Communicate effectively to leadership the status of work activities. • Effectively manage multiple priorities.

*]:pointer-events-auto scroll-mt-[calc(var(--header-height)+min(200px,max(70px,20svh)))]" dir="auto" data-turn-id="request-WEB:8895ffa3-1710-41b9-a351-3ae5da119ced-9" data-testid="conversation-turn-2" data-scroll-anchor="true" data-turn="assistant">CTG is hiring a Senior Verification Engineer to support advanced digital/SoC development. This is a high-impact role focused on RTL verification, modern methodologies, and complex system validation. Location: RemoteDuration: 6 months Top Skills (Must-Have): - SystemVerilog & UVM (strong hands-on experience) - RTL/Digital Design Verification - AXI protocol knowledge - Coverage-driven verification & debugging Nice to Have: - UCIe familiarity - Experience with complex SoCs or high-performance IP What You’ll Do: - Build and execute UVM-based verification environments - Develop testbenches, test cases, and coverage models - Debug RTL issues and collaborate with design teams - Drive verification closure using functional/code coverage Education: - Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience Excellent verbal and written English communication skills and the ability to interact professionally with a diverse group are required. CTG does not accept unsolicited resumes from headhunters, recruitment agencies, or fee based recruitment services for this role. To Apply:To be considered, please apply directly to this requisition using the link provided. For additional information, please contact Laura Dominguez at Laura.Dominguez@ctg.com. Kindly forward this to any other interested parties. Thank you! The expected base salary for this position ranges from $175,000 to $195,000. Salary offers are based on a wide range of factors including relevant skills, training, experience, education, market factors, and where applicable, licensure or certifications obtained. In addition to salary, a competitive benefit package is also offered. About CTG CTG, a Cegeka company, delivers IT and business solutions that enhance clients’ digital agility, empowering them to seize new opportunities and overcome any challenge. Backed by more than 60 years’ experience and a commitment to being a reliable, results-driven partner, we work shoulder to shoulder with clients to shape digital together. Our vision is to be an indispensable partner to our clients and the preferred career destination for digital and technology experts. With more than 9,000 team members in over 15 countries, we combine global expertise with local insight to deliver innovative solutions. We operate across the Americas, Europe, and India, working with over 3,000 clients in many of today's highest-growth industries. Together, we shape what’s next—working shoulder to shoulder to deliver impactful solutions for our clients and society. Our culture is built by the people who work at CTG, the values we hold, and the actions we take. It's a living, breathing thing that is renewed every day through the ways we engage with each other, our clients, and our communities. At CTG, you’ll find a workplace where you are encouraged to grow, supported in your ambitions, and empowered to shape your own career journey. For more information, visit www.ctg.com. CTG will consider for employment all qualified applicants including those with criminal histories in a manner consistent with the requirements of all applicable local, state, and federal laws. CTG is an Equal Opportunity Employer. CTG will assure equal opportunity and consideration to all applicants and employees in recruitment, selection, placement, training, benefits, compensation, promotion, transfer, and release of individuals without regard to race, creed, religion, color, national origin, sex, sexual orientation, gender identity and gender expression, age, disability, marital or veteran status, citizenship status, or any other discriminatory factors as required by law. CTG is fully committed to promoting employment opportunities for members of protected classes.