• Prototyping, integration, and development of drivers and components in embedded C for customer audio projects (TWS Earbuds, Headsets, Speakers) according to the product requirements based on the various SoCs, primarily focused on Qualcomm platforms, specifically the new S7 platform • Hardware/SW configurations and measurements during prototyping and pre-production • Developing unit and integration tests to verify software integrity using analysis tools to check for potential issues in our codebase

Role Description Unlock the power of Safety- and Mission-Critical Engineering with QDSS. We are seeking exceptional individuals to join our elite team- where your expertise will make an impact that matters. Elevate your career in a company dedicated to excellence and the pursuit of safety and mission success. Quest Defense Systems & Solutions (QDSS) is supporting the verification of a complex aerospace data management platform and is looking for FPGA Simulation / Verification Engineers with strong UVM experience. This role centers on developing and enhancing a SystemVerilog/UVM-based verification environment for safety-critical FPGA designs. You will work alongside a senior verification team to: - Build scalable testbenches - Develop sequences - Debug RTL issues in simulation - Ensure compliance with DO-254 DAL A standards The ideal candidate brings deep hands-on experience in UVM testbench development, strong debugging skills, and a solid understanding of digital design and FPGA verification methodologies. Due to the nature of the project, all applicants must be U.S. citizens. This role is remote with a preference for candidates who live or are willing to relocate to Cedar Rapids, IA. Qualifications - Bachelor's Degree in electrical, computer or software engineering from an accredited college or university - 10+ years of relevant FPGA Verification experience - Ability to construct FPGA Test Bench using UVM Components - Deep experience with System Verilog - Experience with Sequence Development - Experience with developing DO-254 related documents including but not limited to: Test Plans, Test Procedures, Test Cases, Maintaining a Trace Matrix - Troubleshooting RTL Design Flaws using Simulation Environment - Ability to take a problem and come up with a solution - Familiarity with Unit level testbenches - Familiarity with Chip Level testbenches Requirements - Experience developing UVM Predictors and Scoreboards to implement self-checking simulation tests - Familiarity with Register Modeling and Predicting Register Behavior - Proficiency in developing UVM Agents, Drivers, Monitors, and Sequence Items - Experience with Code Coverage Analysis for RTL Source (Statement, Branch, FSM, FSM Transition) Benefits - Competitive pay - Comprehensive medical/dental/life and disability coverage - 401(k) with employer match - Professional development support - Flexible, friendly workplace Full compensation package is based on candidate experience and certifications. Pay ranges from $150,000 to $180,000 USD.

Job Description The Role: The Senior Signal Integrity Engineer at General Motors plays a crucial role in ensuring the performance and reliability of high-speed hardware designs within the ECU Electrical team. This position involves simulating HW designs, measurements in lab mitigating signal degradation issues, collaborating with cross-functional teams, and optimizing design processes to support the development of next-generation automotive systems. The engineer will be responsible for product development activities, focusing on in-vehicle electronics and cutting-edge technologies. What You'll Do: - Perform signal integrity (SI) simulations using tools such as HyperLynx, HFSS, or CST - Identify and resolve issues related to crosstalk, signal loss, reflections, and other performance degradations in high-speed designs. - Analyze PCB layout designs to ensure optimal signal performance, providing feedback and recommendations to layout and hardware design teams. - Collaborate with hardware engineers to optimize high-speed signal paths, ensuring adherence to specifications for interfaces like DDR5, PCIe, USB4, SerDes, and Ethernet. - Evaluate and validate signal integrity for power delivery networks (PDN) to minimize noise, ground bounce, and power/ground integrity issues. - Work closely with PCB layout, hardware, and mechanical teams to ensure design choices align with signal integrity best practices. - Develop and implement test strategies for verifying signal integrity on prototypes and final products using tools like oscilloscopes, vector network analyzers (VNA), and time domain reflectometry (TDR). - Create and maintain signal integrity design guidelines, best practices, and checklists to support hardware engineers throughout the product development lifecycle. - Diagnose and resolve SI issues during the bring-up phase of new products, ensuring minimal impact on time-to-market. What You'll Need: - Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field. - 5+ years of experience in signal integrity and related areas in hardware engineering with hands on experience on LPDDR5, PCIe, USB4, SerDes and Ethernet protocols. - Strong understanding of high-speed signal transmission principles, including impedance, crosstalk, noise, and signal attenuation. - Proficiency in SI analysis tools such as Ansys HFSS, SIWave, CST or similar industry-standard software. - Hands-on experience with lab equipment such as oscilloscopes, VNAs, TDRs, and protocol analyzers. - Ability to contribute to process improvements and the development of new methodologies for signal integrity analysis. GM DOES NOT PROVIDE IMMIGRATION-RELATED SPONSORSHIP FOR THIS ROLE. PLEASE DO NOT APPLY FOR THIS ROLE IF YOU WILL NEED GM IMMIGRATION SPONSORSHIP (e.g., H-1B, TN, STEM OPT, etc.) NOW OR IN THE FUTURE. •This job is may be eligible for relocation benefits. About GM Our vision is a world with Zero Crashes, Zero Emissions and Zero Congestion and we embrace the responsibility to lead the change that will make our world better, safer and more equitable for all. Why Join Us We believe we all must make a choice every day – individually and collectively – to drive meaningful change through our words, our deeds and our culture. Every day, we want every employee to feel they belong to one General Motors team. Benefits Overview From day one, we're looking out for your well-being–at work and at home–so you can focus on realizing your ambitions. Learn how GM supports a rewarding career that rewards you personally by visiting Total Rewards resources. Non-Discrimination and Equal Employment Opportunities (U.S.) General Motors is committed to being a workplace that is not only free of unlawful discrimination, but one that genuinely fosters inclusion and belonging. We strongly believe that providing an inclusive workplace creates an environment in which our employees can thrive and develop better products for our customers. All employment decisions are made on a non-discriminatory basis without regard to sex, race, color, national origin, citizenship status, religion, age, disability, pregnancy or maternity status, sexual orientation, gender identity, status as a veteran or protected veteran, or any other similarly protected status in accordance with federal, state and local laws. We encourage interested candidates to review the key responsibilities and qualifications for each role and apply for any positions that match their skills and capabilities. Applicants in the recruitment process may be required, where applicable, to successfully complete a role-related assessment(s) and/or a pre-employment screening prior to beginning employment. To learn more, visit How we Hire. Accommodations General Motors offers opportunities to all job seekers including individuals with disabilities. If you need a reasonable accommodation to assist with your job search or application for employment, email us or call us at 1-800-865-7580. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Role Description - Perform PPA optimization with Fusion compiler to enhance ASIC efficiency. - Conduct RTL and netlist level power analysis to improve power management. - Execute post-processing and scripting on report log files for format conversion and data analysis. - Setup, run, debug, and analyze reports of ASIC flows including Synthesis, PD, Power, and Timing. - Implement blocks at RTL and UPF to optimize design processes. - Document and communicate findings clearly to enhance team understanding. Qualifications - Must-Have: - 10+ years of experience as an ASIC Power Engineer or CAD/Physical Design Engineer. - Experience with power estimation tools and synthesis, including some physical design. - Knowledge of power trade-offs in design and back end implementation. - Hands-on experience in scripting and data analysis. - Bachelor's degree in Electrical Engineering/Computer Science or equivalent experience. - Preferred: - Experience with Synopsys (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence (Joules). - Python, Perl (or similar) scripting and data-post-processing tools. - Excel (or Matlab) for model fitting, data visualization, and analysis. - Experience in low power design, tools, and methodologies including power intent UPF specifications. - Silicon Power Characterization. - Some power profiling experience at IP/SoC level. Company Description Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark, General Catalyst, Peter Thiel, Adam D'Angelo, Larry Summers, and Jack Dorsey.