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ASIC Engineer

Location

United States

Posted

94 days ago

Salary

0

Seniority

Mid Level

No structured requirement data.

Job Description

ASIC Engineer

Staffing Solutions United

This description is a summary of our understanding of the job description. Click on 'Apply' button to find out more. Role Description This role involves supporting advanced semiconductor development initiatives across high-performance and low-power silicon programs. - Develop and maintain RTL designs using Verilog/SystemVerilog - Support microarchitecture definition and technical design documentation - Perform synthesis, constraint development, and static timing analysis - Contribute to power optimization and low-power implementation strategies - Collaborate with verification teams to ensure robust test coverage and issue resolution - Work closely with physical design teams on floorplanning, timing closure, and signoff - Analyze and optimize power, performance, and area (PPA) metrics - Participate in design reviews and maintain high engineering quality standards Qualifications - Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related discipline - 4+ years of ASIC or digital IC development experience - Strong proficiency in Verilog/SystemVerilog - Experience with synthesis and static timing analysis tools - Understanding of clock domain crossing (CDC) and reset domain crossing (RDC) methodologies - Familiarity with advanced technology nodes (28nm and below preferred) - Solid knowledge of digital logic design fundamentals Requirements - Experience with SoC integration and subsystem-level design - Familiarity with industry-standard EDA tools (Synopsys, Cadence, or equivalent) - Experience with low-power design techniques and UPF - Scripting experience (Python, Tcl, Perl) for automation - Exposure to DFT methodologies and silicon bring-up Additional Information - Remote opportunities available depending on client program requirements - W2 engagement; no third-party or C2C arrangements - Candidates will undergo technical screening and verification

Job Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related discipline
  • 4+ years of ASIC or digital IC development experience
  • Strong proficiency in Verilog/SystemVerilog
  • Experience with synthesis and static timing analysis tools
  • Understanding of clock domain crossing (CDC) and reset domain crossing (RDC) methodologies
  • Familiarity with advanced technology nodes (28nm and below preferred)
  • Solid knowledge of digital logic design fundamentals
  • Experience with SoC integration and subsystem-level design
  • Familiarity with industry-standard EDA tools (Synopsys, Cadence, or equivalent)
  • Experience with low-power design techniques and UPF
  • Scripting experience (Python, Tcl, Perl) for automation
  • Exposure to DFT methodologies and silicon bring-up
  • Additional Information
  • Remote opportunities available depending on client program requirements
  • W2 engagement; no third-party or C2C arrangements
  • Candidates will undergo technical screening and verification

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