• The primary responsibility of the Senior Software Engineer (AI-First Development) is to design, orchestrate, and validate software applications built through AI-driven development workflows. • This role operates within an AI-First Software Development Lifecycle (SDLC) where AI agents serve as the primary producers of code, configuration, and test artifacts. • The engineer provides architectural direction, context engineering, human-in-the-loop governance, and final accountability for all delivered software. • Combine deep software engineering fundamentals with the ability to think in systems, design effective agent workflows, and validate AI-generated outputs across security, correctness, performance, and compliance dimensions. • Design, build, and maintain AI agent workflows that produce application code, infrastructure configuration, test suites, and documentation. • Decompose complex application requirements into discrete tasks that AI agents can execute effectively. • Select and configure appropriate AI models, agent frameworks, and tooling for each workflow based on task complexity, risk level, and cost considerations. • Author and maintain the agent toolchain, including Skills (SKILL.md) for reusable domain knowledge, hooks for deterministic automation at defined workflow points, and project memory files (CLAUDE.md, AGENTS.md). • Review, test, and approve AI-generated code, ensuring it meets Sands coding standards, architectural guidelines, and security requirements before promotion to production. • Coordinate with development teams across global locations to ensure consistency in agent workflows and coding standards. • Evaluate emerging AI models, agent frameworks, and development tools to continuously improve workflow effectiveness and output quality.

• Direct the day-to-day technical execution of a small AI-First engineering team • Architect and deliver full-stack applications using AI-First methodologies • Define and maintain AI agent workflows • Collaborate with cross-functional teams to translate business requirements into executable workflows • Mentor team members on AI-assisted development practices

Role Description We're looking for a TPU and AMD GPU performance engineer to make vLLM a first-class inference engine across non-NVIDIA accelerators. Frontier inference cannot be locked to one hardware stack. As AMD GPUs, TPUs, and other accelerators become increasingly important, vLLM needs backend paths that are fast, correct, benchmarked, and maintainable across heterogeneous hardware platforms. - Build and optimize AMD GPU and TPU backends, kernels, compiler integrations, runtime paths, and benchmarking infrastructure. - Work at the boundary of inference systems, kernels, compilers, and hardware architecture. - Improve paths such as attention, GEMM, sampling, KV-cache, communication-heavy operations, and model serving on non-NVIDIA hardware. - Your work will directly impact how broadly and efficiently the world can run AI inference with vLLM. Qualifications - Bachelor's degree or equivalent experience in computer science, engineering, machine learning systems, hardware systems, compilers, or similar. - Hands-on experience optimizing workloads on AMD GPUs, TPUs, or another non-NVIDIA accelerator stack. - Experience with AMD ecosystem tools such as ROCm, HIP, Triton, CK, AITER, or equivalent GPU performance libraries and tooling. - Experience with TPU, XLA, JAX, Pallas, or related compiler and runtime tooling for accelerator workloads. - Ability to optimize ML inference paths such as attention, GEMM, sampling, KV-cache, fused kernels, backend runtimes, or communication-heavy operations. - Strong performance profiling and benchmarking discipline, including tokens/second, latency, throughput, correctness parity, hardware counters, and reproducible measurement methodology. - Ability to navigate immature tooling, incomplete documentation, backend-specific rough edges, and cross-platform performance differences without getting stuck. Requirements - Experience with vLLM, SGLang, TensorRT-LLM, ATOM, JAX-based serving framework, or other LLM inference systems. - Deep understanding of inference architecture and serving tradeoffs, including batching, KV-cache, decoding, prefill/decode scheduling, and backend performance constraints. - Experience with compiler technologies such as XLA, MLIR, LLVM, Triton, Pallas, or other compiler/kernel DSLs, including lowering, fusion, and backend code generation. - Knowledge of quantization techniques such as MXFP8, MXFP4, mixed precision, or hardware-specific numeric formats, and the ability to reason about accuracy/performance tradeoffs. - Experience with distributed inference performance, including communication, memory movement, hardware topology, and scale-out bottlenecks across multi-accelerator workloads. - Open-source contributions to vLLM, JAX/XLA, ROCm, Triton, PyTorch, compiler projects, or related ML systems infrastructure. Benefits - Generous health, dental, and vision benefits. - 401(k) company match. Logistics - Location: This role is based in San Francisco, California. Will consider remote in the US for exceptional candidates. - Compensation: Depending on background, skills, and experience, the expected annual salary range for this position is $200,000 - $400,000 USD + equity. - Visa sponsorship: We sponsor visas on a case-by-case basis.

• Leading design, development, and evolution of BI and analytics solutions for healthcare coding and clinical data products for global customers • Implementing Enterprise analytics best practices, data models, semantic models, agentic and generative AI analytics solutions • Determining the BI architecture, data modeling, and analytics best practices for delivery of Solventum HIS products and customer solutions • Supporting Solventum HIS analytics development for both internal and external customers across the US and the globe • Working closely with team throughout Solventum to deliver our data driven products