• Conduct finite element analyses (FEA) of challenging dynamic structural applications that include contact, nonlinear material behavior, transient heat transfer and fracture using the explicit finite element code LS-DYNA. • Lead design and analysis of vehicle structures • Lead test planning and data analysis with potential for onsite test support. • Develop digital twins of complex structural tests including test response, data analysis and comparison with simulations. • Perform engineering analyses on a variety of structures projects. • Lead proposals for new research and development opportunities with government and industry clients. • Conduct face-to-face meetings and prepare technical and cost proposals.

• Conduct finite element analyses (FEA) of challenging dynamic structural applications that include contact, nonlinear material behavior, transient heat transfer and fracture using the explicit finite element code LS-DYNA. • Construct finite element meshes of complicated geometries. • Assist in test planning and test data analysis with potential for onsite test support. • Develop digital twins of complex structural tests including test response, data analysis and comparison with simulations. • Perform engineering analyses on a variety of structures projects. • Identify and qualify new research and development opportunities with government and industry clients. • Conduct face-to-face meetings and prepare technical and cost proposals.

Role Description As a member of Recogni’s ASIC team, you will be responsible for the pre-silicon correctness and quality of a high-performance and low-power convolutional neural network accelerator ASIC that forms the core of the company’s flagship perception module product for autonomous driving applications. This ASIC’s design closely couples novel computational accelerator units with 3rd-party SoC IP blocks to form an end-to-end vision perception module that achieves record-breaking computational performance at low power. - Ensure the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP blocks. - SoC/Subsystem verification of embedded CPUs such as ARM/RISC-V and interconnect subsystem (including C and assembly diag validation). - Develop the block-level, sub-system and full-chip verification environment and tests to implement test plans. - Work closely with design and architecture teams to understand the functional and performance goals of the design; and work together to make the design-under-test work under all specified circumstances. - Triage and debug functional and performance issues with the design-under-test. - Handle bug tracking and coverage convergence. - Perform diagnostic and post-silicon validation tests in the lab. Qualifications - 2+ years of ASIC verification experience. - Knowledge of ARM/MIPS/RISC-V Architecture. - Familiarity with AMBA/APB/AXI Protocol. - Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C. - Excellent Verilog/System Verilog programming skills. - Experience with UVM (or similar). - Deep understanding of object-oriented programming principles, constrained random stimulus, and a coverage-driven verification approach. - Scripting experience (Python, Perl, TCL, shell programming) highly-desirable. - Interest to explore AI architectures for convolution, transformer and other kinds of workloads. - Self-starter and highly-motivated to work in a dynamic start-up environment. - B.S. (M.S. preferred) degree in Electrical or Computer engineering (or similar field). Benefits - Ground floor opportunity with the team; be part of shaping one of the most exciting new companies. - Learning and development opportunities from a highly diverse and talented peer group, including experts in a wide range of fields, from Artificial Intelligence & Computer Vision to Systems & Device Engineering. - Competitive benefits package including Medical, Vision, Dental. - Perks including meals, snacks, drinks and us! - Sharp, motivated co-workers in a fun office environment. - Flexible work hours & generous PTO policy.

• Take projects from spec to deployed software, with Claude Code (and other coding agents where they fit) doing most of the typing • Author CLAUDE.md files, skills, and prompt systems that produce consistent output • Manage context, sub-agents, memory, and tokens across long-running tasks • Drive TDD with agents using hooks, sub-agents, and verification patterns, and don't let the agent cheat • Set up CI/CD, deployments, databases, secrets, and monitoring properly • Be the final quality gate. Review what the agent produced, refactor what's wrong, ship what works