Innatera

• Bridging the gap between the market and our internal teams by actively translating client feedback and usage scenarios into actionable product improvements. • Build deep technical relationships with customer architects and engineering management, serving as their primary technical advisor • Dealing with technical questions/issues from customers, and assisting our customers in accelerating their development of our technology • Training customers (alongside the engineering teams) by organising workshops and training sessions • Help and guide customers through the design process including architecture reviews, schematic reviews, design-in support and training customers on product features. • Partner with Sales to identify opportunities and articulate the value of Innatera technology to secure wins • Collaborating actively with the SDK/EDK, architecture, and Product owner teams

• Develop and maintain SystemVerilog/UVM-based verification environments at both module and SoC level; • Write test sequences, define functional coverage models, and ensure coverage closure; • Debug simulation results using waveform tools and collaborate with design teams to resolve issues; • Drive constrained-random stimulus generation and continuous improvements in our verification methodology; • Apply modern EDA tools and automate verification flows to maximize speed and quality; • Contribute to quality assurance, release-readiness, and design-test alignment for every chip.