• Design, develop, validate, and maintain API gateway automation workflows. • Create configuration-as-code artifacts and developer portal integrations. • Build reusable onboarding patterns and API lifecycle capabilities. • Ensure gateway-side implementation components function effectively. • Hands-on engineering focused on API lifecycle modernization and developer self-service enablement.

• carry out breakdown and repair work on all escalators within the portfolio • ensure continual operation of escalators • manage the escalator portfolio within the London Underground network • respond proactively to fix breakdowns, aiming for first time fix • liaise directly with customers on site to build working relationships

• Demonstrates an understanding of signal flows, signal measurements, and operational procedures • Monitors and performs quality control on live event and linear acquisition signals across multiple transport formats • Collaborates with internal teams and external partners to support the acquisition, monitoring, and distribution of live feeds • Troubleshoots and resolves day-to-day operational issues to ensure reliable signal delivery and service continuity • Follows and executes established Standard Operating Procedures (SOPs) and workflows for assigned transmission and distribution responsibilities

Role Description Positron AI is building next-generation AI inference accelerators, starting with our first ASIC, Asimov, with additional generations already underway. As Principal DFT Engineer, you'll own DFT and DFx strategy end-to-end: - Defining the DFT architecture for our accelerators - Integrating it into internal RTL and third-party IP - Driving implementation with our backend design partner - Ensuring high-quality silicon bring-up through comprehensive pre-silicon validation This is a hands-on, technical ownership role spanning architecture through tapeout and into first silicon, not a coordination role. Qualifications - BS, MS, or PhD in Electrical Engineering or Computer Engineering - 12+ years of ASIC development experience - Extensive hands-on DFT implementation experience on complex SoCs, with multiple successful production tapeouts - Strong understanding of scan architectures, ATPG, memory BIST, logic BIST, boundary scan, IJTAG, test compression, fault models, and structural coverage analysis - Experience with leading DFT tool suites (e.g., Siemens Tessent, Synopsys TestMAX DFT, Cadence Modus, or equivalent) - Strong RTL skills using Verilog/SystemVerilog - Experience with synthesis and gate-level verification - Strong scripting skills (Python, Tcl, Perl, or similar) - Excellent debugging skills across RTL, netlists, and silicon test - Demonstrated ability to drive technical execution across cross-functional engineering teams Requirements - Own the Positron DFT strategy - Define and maintain the DFT architecture for Asimov and future ASIC generations - Develop long-term DFT and DFx roadmaps aligned with product quality, manufacturing, yield, diagnostics, and reliability objectives - Establish DFT design standards, review processes, signoff criteria, and best practices across the engineering organization - Hands-on DFT implementation - Architect and implement scan insertion, compression, ATPG, memory BIST, logic BIST (where appropriate), boundary scan / IEEE 1149.x, IJTAG / IEEE 1687 infrastructure, and debug/observability features - Integrate DFT into internally developed RTL - Evaluate and integrate DFT capabilities from third-party IP providers - Work directly in RTL, synthesis, and DFT tool flows - Drive pre-silicon DFT verification - Develop comprehensive DFT verification plans - Validate DFT functionality through simulation and gate-level verification - Ensure structural coverage targets are achieved before tapeout - Drive DDA, stuck-at, transition, cell-aware, and power-aware ATPG strategies - Own DFT signoff - Partner with Physical Design - Work closely with backend implementation teams to ensure successful physical realization of DFT architecture - Guide scan chain partitioning, compression planning, and test clock architecture - Address power-aware test implementation, timing closure considerations, and test mode integration - Own external DFT execution - Serve as Positron's technical lead for all DFT work performed by external design services partners - Review implementation quality and conduct design reviews - Drive issue resolution - Define deliverables and acceptance criteria - Ensure external work meets Positron quality standards - Cross-functional leadership - Partner closely with RTL designers, design verification, physical design, package and test engineering, firmware, system software, and silicon validation to ensure DFT is designed in from architecture through silicon bring-up - AI-enabled engineering - Leverage modern AI tools to improve engineering productivity, including automated review of DFT reports, ATPG analysis, coverage analysis, regression triage, documentation generation, workflow automation, and agentic engineering assistants - Continuously evaluate new AI techniques that accelerate DFT development while improving quality Benefits - Be part of a rapidly growing AI startup shaping the future of AI hardware - Work on groundbreaking technology with a highly skilled and passionate team - Competitive salary, equity, and comprehensive benefits package - Flexible work environment with remote work options Compensation and Benefits The base salary range for this role is $200,000 – $350,000. Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits. At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity and individual impact. Equal Opportunity Employer. If you’re excited about the role but don’t meet every bullet, we’d still love to hear from you.