Senior LPU ASIC Engineer

Hardware EngineerHardware EngineerFull TimeRemoteSeniorTeam 10,001+Since 1993H1B SponsorCompany SiteLinkedIn

Location

Arizona + 3 moreAll locations: Arizona | California | North Carolina | Oregon

Posted

8 days ago

Salary

$136K - $218.5K / year

Seniority

Senior

Bachelor Degree5 yrs expEnglishPerlPython

Job Description

Senior LPU ASIC Engineer

NVIDIA

• Responsible for Synthesis, floorplanning, place & route, timing constraints, UPF and LEC • Partner with IP, Front-End logic design and Architecture teams for optimization • Lead design closure ensuring 100% verification compliance for GDSII handoff and tapeout • Architect data-driven EDA flows and methodologies with automated enhancements

Job Requirements

  • B.S. in Electrical/Computer Engineering or equivalent experience (M.S./Ph.D. preferred)
  • 5+ years of industry experience delivering full-flow physical design for large-scale, high-performance SoCs at advanced process nodes
  • Proven track record of driving designs through the complete RTL-to-GDSII flow
  • Deep understanding of low-power design intent (UPF/CPF)
  • Expert-level proficiency in advanced CTS methodologies, clock tree synthesis, and sign-off timing analysis (MCMM STA)
  • Strong command of power grid design, EMIR analysis, and ECO generation
  • Skilled in employing best-known methods to optimize DFT structures
  • Expert-level command of industry-standard tool suites for end-to-end physical design flows
  • Proficient in scripting (TCL, Python, Perl)

Benefits

  • Comprehensive benefits package
  • Health insurance
  • Retirement plans
  • Paid time off
  • Flexible work arrangements
  • Professional development
  • Equity

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