• Designing the central compute chiplet that powers next generation automotive SoC. • Turning real world automotive and safety requirements into architecture that performs, scales, and ships fast and reliably. • Working within the performance, power, and reliability constraints while delivering impactful features. • Collaborating across design, verification, software, and systems teams.

• Drive the architecture, micro-architecture, design and optimization of the CPU load-store unit for Tenstorrent’s high-performance out-of-order RISCV CPUs • Propose new implementations to optimize load-store PPA • Perform simulations, modeling, and performance analysis of advanced CPU features and state-of-the-art data prefetchers • Collaborate with hardware and software teams to optimize memory access patterns and system performance. • Stay up to date with industry trends and emerging technologies in CPU architecture and the memory subsystem • Support documentation and presentation of architectural decisions, trade-offs, and findings.

• Work across ML software stacks, compilers, CPU design, cache coherency protocols, and interconnect fabrics • Make data-driven decisions that directly influence SoC performance • Shape the future of high-performance systems

• Define the architecture and micro-architecture specifications for memory and I/O chiplets • Explore and evaluate next-generation memory technologies • Develop and own a detailed performance and power modeling infrastructure • Work closely with SoC design/verification, physical design, packaging, and systems engineering teams