Pioneering Analog Compute for AI
Compiler Engineer – Algorithmic Workloads
Location
California
Posted
70 days ago
Salary
0
Seniority
Senior
Job Description
Compiler Engineer – Algorithmic Workloads
Mythic
• Help push the boundaries of what can run on our accelerator. • Design compiler IRs and lowering strategies to support algorithmic workloads with irregular or dynamic control flow—loops, branches, and iterative methods—going beyond static neural networks. • Work side by side with hardware engineers to influence ISA and execution model co-design to unlock new algorithm classes on analog and digital subsystems. • Create a compiler that makes complex algorithms practical to deploy while staying seamless for developers.
Job Requirements
- 3+ years of professional experience in compilers or high-performance systems software
- Proficiency in modern C++ (C++14/17/20) and Python
- Familiarity with compiler IRs (e.g., MLIR, LLVM, or equivalent) and their use representing complex program structures
- Solid foundation in program analysis and optimization techniques (e.g., SSA form, loop optimizations, vectorization)
Benefits
- The opportunity to make algorithmic and control-flow-heavy workloads practical on novel accelerator hardware.
- A role that bridges compiler design and hardware co-design, shaping both the IR and the accelerator architecture.
- A collaborative, innovative team that values engineering rigor, continuous integration, and user-focused design.
- Competitive compensation, equity, and benefits package.
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