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Encore Semi logo
Encore Semi

Based in San Diego, California, Encore Semi is a privately-held semiconductors and engineering services company that specializes in building expert teams, or Centers of Expertise,

Senior Design Verification Engineer

Location

United States

Posted

115 days ago

Salary

$140K - $160K / year

Seniority

Senior

Job Description

Senior Design Verification Engineer

Encore Semi

This description is a summary of our understanding of the job description. Click on 'Apply' button to find out more. Role Description Verification of ASIC and SoC Designs from specification through bring-up using industry verification methodologies. Understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. - Working with architects, designers, pre and post silicon verification teams as well as test and reliability teams. Qualifications - Experience in architecting test bench environments for IP integration and top-level interconnect verification. - Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies desired. - 10+ years’ experience with in-depth knowledge of digital design concepts, proven experience in ASIC and SoC verification, verification of large digital blocks, including processor cores. - Expertise in standard interfaces such as AXI, PCIe, USB, SPI, and more. - Expertise in Verilog and/or System Verilog. - Perl and C/C++ programming language experience desired. - Good debugging and problem solving skills. Requirements - The anticipated annual base salary for this position is between $140,000 to $160,000, which also includes a comprehensive benefits package. Benefits - 15 days of PTO per calendar year. - 10 paid Holidays per calendar year. - Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents. - Dental & Vision: Company covers 50% of premiums for Employee and Dependents. - Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance. - Employee Assistant Program (EAP). - 401k - Traditional & Roth. - Life/AD&D and Long-Term Disability. - Tuition reimbursement.

Job Requirements

  • Experience in architecting test bench environments for IP integration and top-level interconnect verification.
  • Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies desired.
  • 10+ years’ experience with in-depth knowledge of digital design concepts, proven experience in ASIC and SoC verification, verification of large digital blocks, including processor cores.
  • Expertise in standard interfaces such as AXI, PCIe, USB, SPI, and more.
  • Expertise in Verilog and/or System Verilog.
  • Perl and C/C++ programming language experience desired.
  • Good debugging and problem solving skills.
  • The anticipated annual base salary for this position is between $140,000 to $160,000, which also includes a comprehensive benefits package.

Benefits

  • 15 days of PTO per calendar year.
  • 10 paid Holidays per calendar year.
  • Comprehensive Medical Benefits: Company covers 80% of premiums for Employee and Dependents.
  • Dental & Vision: Company covers 50% of premiums for Employee and Dependents.
  • Voluntary Benefits: Life Insurance, FSA (Health and Dependent, Limited Purpose), HAS, and Gap Insurance.
  • Employee Assistant Program (EAP).
  • 401k - Traditional & Roth.
  • Life/AD&D and Long-Term Disability.
  • Tuition reimbursement.

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