• Develop the Tailscale product, contributing to client code and backend services. • Bring a special focus on our Windows platform, building and maintaining our Windows client. • Work with engineers on a native Windows desktop client using Windows App SDK, WinUI, C#, XAML and Go. • Implement support for the latest Windows platform features. • Develop and optimize product features on Windows, with a focus on UI components and platform integration. • Develop and maintain unit and integration tests using Microsoft Testing Platform v2 and xUnit. • Contribute to common, cross-platform Tailscale code.

• Gestão e Auditoria de SMS em Contratos • Monitoramento de Desempenho • Suporte e Conformidade Documental • Fiscalização e Inspeções • Interface com Sistemas e Comitês

• Perform field walkdowns to verify the accuracy and completeness of equipment and asset information prior to entry into the Computerized Maintenance Management System. • Review, validate, and enter technical asset and maintenance data into CMMS platforms while ensuring compliance with established data standards and project requirements. • Translate, cleanse, and prepare raw equipment and maintenance data for system migration, implementation, and ongoing maintenance activities. • Support data migration projects by reviewing legacy system data, identifying discrepancies, and assisting with the accurate transfer of asset information into the CMMS. • Assist in the preparation of project documentation and client status reports while tracking assigned tasks against project timelines. • Communicate data discrepancies, project risks, or delays to the Project Manager and support timely resolution of identified issues. • Collaborate with engineers, technicians, and client stakeholders to collect equipment information, validate asset data, and support successful CMMS implementation activities. • Participate in stakeholder meetings to communicate project progress, discuss changes, and support change management initiatives throughout project execution. • Utilize Microsoft Excel and other data management tools to organize, validate, and analyse asset and maintenance data. • Extract and analyse CMMS data using business intelligence and reporting tools to support operational reporting, key performance indicators (KPIs), and business decision-making. • Provide first-line support to CMMS users by assisting with system navigation, responding to user queries, and maintaining asset and equipment records. • Support continuous improvement initiatives focused on CMMS optimization, asset data quality, and maintenance processes. • Maintain accurate documentation relating to asset data, system updates, and project activities.

Role Description Tenstorrent is looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan, and other countries, and help us make our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. This role is remote based out of the United States. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Qualifications - Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or Computer Science - 10+ years of relevant DFT experience - Hands-on experience with industry-standard DFT tools such as Synopsys and Siemens - Scripting experience in TCL and Python - Expertise in DFT planning, SoC-level silicon debug, formal verification, and signoff of inserted DFT logic - Strong cross-functional collaboration skills Requirements - Build and execute chip-level DFT strategies for high-speed CPU core designs and multi-chiplet System-in-Package programs - Implement and verify DFT features including scan chains, memory BIST, and JTAG to support manufacturing test and silicon debug - Partner with RTL, physical design, and verification teams to ensure testability throughout the design flow - Script, automate, and analyze DFT flows using industry-standard EDA tools, including ATPG and fault coverage reporting What you will learn - How to develop DFT strategies for advanced multi-chiplet and System-in-Package designs - How Tenstorrent approaches testability, silicon bring-up, and manufacturing readiness for high-performance CPU programs - How to work across global teams and external stakeholders on complex silicon development efforts - How to scale DFT execution through automation, deeper cross-functional collaboration, and continuous IP improvement Benefits - Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets - Highly competitive compensation package and benefits - Equal opportunity employer