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NVIDIA logo
NVIDIA

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hard-working people in the world working for us. Are you creative and autonomous? Do you love a challenge? If so, we want to hear from you. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Dataflow Development Engineer

EngineerEngineerFull TimeRemoteSeniorTeam 10,001+Since 1993H1B SponsorCompany SiteLinkedIn

Location

Netherlands

Posted

87 days ago

Salary

0

Seniority

Senior

Bachelor Degree5 yrs expEnglishLinux

Job Description

Dataflow Development Engineer

NVIDIA

• Build and implement dataflow pipelines and streaming architectures in FPGA or programmable logic. • Develop host-side software, drivers, and runtimes that collaborate with FPGA and accelerator hardware (e.g. PCIe, DMA, VFIO). • Partner with compiler and hardware groups to allocate dataflow graphs onto hardware resources; improve latency, processing efficiency, and area/utilization. • Build and maintain hardware–software co-design flows: from high-level dataflow specs to synthesis, place-and-route, and validation. • Build tooling and methodologies for debugging, profiling, and validating dataflow behavior in hardware; participate in design reviews and cross-team alignment across EMEA and globally.

Job Requirements

  • BS or higher degree or equivalent experience in CS/EE/CE with more than 5 years in FPGA development, hardware dataflow, or hardware/software co-design.
  • Hands-on experience with RTL/HDL (Verilog, VHDL) or high-level synthesis (HLS); ability to build and debug dataflow-style pipelines in hardware.
  • Solid programming abilities in C/C++ for host drivers, runtimes, or tooling; familiarity with hardware interfaces (e.g. PCIe, DMA, memory-mapped I/O).
  • Proven understanding of dataflow and streaming concepts: pipelining, backpressure, buffering, and resource/area trade-offs.
  • Familiarity with FPGA toolchains (synthesis, P&R, timing closure) and with Linux, scripting, and version control.
  • Excellent communication in English; ability to work with distributed teams.

Benefits

  • Competitive salary
  • Flexible working hours
  • Professional development budget
  • Home office setup allowance
  • Global team events

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